翻訳と辞書
Words near each other
・ "O" Is for Outlaw
・ "O"-Jung.Ban.Hap.
・ "Ode-to-Napoleon" hexachord
・ "Oh Yeah!" Live
・ "Our Contemporary" regional art exhibition (Leningrad, 1975)
・ "P" Is for Peril
・ "Pimpernel" Smith
・ "Polish death camp" controversy
・ "Pro knigi" ("About books")
・ "Prosopa" Greek Television Awards
・ "Pussy Cats" Starring the Walkmen
・ "Q" Is for Quarry
・ "R" Is for Ricochet
・ "R" The King (2016 film)
・ "Rags" Ragland
・ ! (album)
・ ! (disambiguation)
・ !!
・ !!!
・ !!! (album)
・ !!Destroy-Oh-Boy!!
・ !Action Pact!
・ !Arriba! La Pachanga
・ !Hero
・ !Hero (album)
・ !Kung language
・ !Oka Tokat
・ !PAUS3
・ !T.O.O.H.!
・ !Women Art Revolution


Dictionary Lists
翻訳と辞書 辞書検索 [ 開発暫定版 ]
スポンサード リンク

65C02 : ウィキペディア英語版
WDC 65C02

The Western Design Center (WDC) 65C02 microprocessor is an enhanced CMOS version of the popular NMOS-based MOS Technology 6502 8-bit microprocessor—the CMOS redesign being made by Bill Mensch in 1978. Over various periods of time, the 65C02 has been second-sourced by NCR, GTE, Rockwell, Synertek and Sanyo. The 65C02 has been used in some home computers, as well as in embedded applications, including medical-grade implanted devices.
==Introduction and features==
The 65C02 is a low cost, general-purpose 8-bit microprocessor (8-bit registers and data bus) with a 16-bit program counter and address bus. The variable length instruction set and manually optimized core size are intended to make the 65C02 well suited for low power system-on-chip (SoC) designs.
The W65C02S–14 is the production version of the 65C02 microprocessor, and is available in PDIP, PLCC and QFP packages through distribution. The maximum officially supported Ø2 (primary) clock speed is 14MHz, indicated by the –14 part number suffix. The "S" designation indicates that the part has a fully static core, a feature that allows Ø2 to be slowed down or fully stopped in either the high or low state with no loss of data. Typical microprocessors not implemented in CMOS have dynamic cores and will lose their internal register contents (and thus crash) if they are not continuously clocked at a rate between some minimum and maximum specified values.
A Verilog hardware description model is available for designing the W65C02S core into an application-specific integrated circuit (ASIC) or a field-programmable gate array (FPGA). As is common in the semiconductor industry, WDC offers a development system, which includes a developer board, an in-circuit emulator (ICE) and a software development system.

抄文引用元・出典: フリー百科事典『 ウィキペディア(Wikipedia)
ウィキペディアで「WDC 65C02」の詳細全文を読む



スポンサード リンク
翻訳と辞書 : 翻訳のためのインターネットリソース

Copyright(C) kotoba.ne.jp 1997-2016. All Rights Reserved.