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翻訳と辞書　辞書検索 [ 開発暫定版 ] スポンサード リンク Adder–subtractor ： ウィキペディア英語版 Adder–subtractor In digital circuits, an adder–subtractor is a circuit that is capable of adding or subtracting numbers (in particular, binary). Below is a circuit that does adding ''or'' subtracting'' depending on a control signal. It is also possible to construct a circuit that performs both addition and subtraction at the same time. ==Construction== Having an ''n''-bit adder for $A$ and $B$, then $S\; =\; A\; +\; B$. Then, assume the numbers are in two's complement. Then to perform $B\; -\; A$, two's complement theory says to invert each bit with a NOT gate then add one. This yields $S\; =\; B\; +\; \backslash overline\; +\; 1$, which is easy to do with a slightly modified adder. By preceding each $A$ input bit on the adder with a 2-to-1 multiplexer where: * Input 0 ($I\_0$) is $A$ * Input 1 ($I\_1$) is $\backslash overline\; A$ that has control input $D$ that is also connected to the initial carry, then the modified adder performs * addition when$D\; =\; 0$, or * subtraction when $D\; =\; 1$. This works because when $D=1$ the $A$ input to the adder is really $\backslash overline$ and the carry in is $1$. Adding $B$ to $\backslash overline$ and $1$ yields the desired subtraction of $B-A$. A way you can mark number $A$ as positive or negative without using a multiplexer on each bit is to use a XOR (Exclusive OR) gate to precede each bit instead. * First input to the XOR gate is the actual input bit * Second input to the XOR gate for each is the control input $D$ This produces the same truth table for the bit arriving at the adder as the multiplexer solution does since the XOR gate output will be what the input bit is when $D\; =\; 0$ and the inverted input bit when $D\; =\; 1$. 抄文引用元・出典: フリー百科事典『 ウィキペディア（Wikipedia）』 ■ウィキペディアで「Adder–subtractor」の詳細全文を読む スポンサード リンク 翻訳と辞書 : 翻訳のためのインターネットリソース Copyright(C) kotoba.ne.jp 1997-2016. All Rights Reserved.