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The ARM Advanced Microcontroller Bus Architecture (AMBA) is an open-standard, on-chip interconnect specification for the connection and management of functional blocks in system-on-a-chip (SoC) designs. It facilitates development of multi-processor designs with large numbers of controllers and peripherals. Since its inception, the scope of AMBA has, despite its name, gone far beyond micro controller devices. Today, AMBA is widely used on a range of ASIC and SoC parts including applications processors used in modern portable mobile devices like smartphones. AMBA is a registered trademark of ARM Ltd.〔 AMBA was introduced by ARM in 1996. The first AMBA buses were Advanced System Bus (ASB) and Advanced Peripheral Bus (APB). In its second version, AMBA 2, ARM added AMBA High-performance Bus (AHB) that is a single clock-edge protocol. In 2003, ARM introduced the third generation, AMBA 3, including AXI to reach even higher performance interconnect and the Advanced Trace Bus (ATB) as part of the CoreSight on-chip debug and trace solution. In 2010 the AMBA 4 specifications were introduced starting with AMBA 4 AXI4, then in 2011〔 extending system wide coherency with AMBA 4 ACE. In 2013〔 the AMBA 5 CHI (Coherent Hub Interface) specification was introduced, with a re-designed high-speed transport layer and features designed to reduce congestion. These protocols are today the de facto standard for 32-bit embedded processors because they are well documented and can be used without royalties. == Design principles == An important aspect of a SoC is not only which components or blocks it houses, but also how they interconnect. AMBA is a solution for the blocks to interface with each other. The objective of the AMBA specification is to: *facilitate ''right-first-time'' development of embedded microcontroller products with one or more CPUs, GPUs or signal processors, *be technology independent, to allow reuse of IP cores, peripheral and system macrocells across diverse IC processes, *encourage modular system design to improve processor independence, and the development of reusable peripheral and system IP libraries *minimize silicon infrastructure while supporting high performance and low power on-chip communication. 抄文引用元・出典: フリー百科事典『 ウィキペディア（Wikipedia）』 ■ウィキペディアで「Advanced Microcontroller Bus Architecture」の詳細全文を読む スポンサード リンク
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