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The Nikon Expeed image/video processors (often styled ''EXPEED'') are media processors for Nikon's digital cameras. They perform a large number of tasks: Bayer filtering, demosaicing, image sensor corrections/dark-frame subtraction, image noise reduction, image sharpening, image scaling, gamma correction, image enhancement/Active D-Lighting, colorspace conversion, chroma subsampling, framerate conversion, lens distortion/chromatic aberration correction, image compression/JPEG encoding, video compression, display/video interface driving, digital image editing, face detection, audio processing/compression/encoding and computer data storage/data transmission. EXPEED's multi-processor system on a chip solution integrates an image processor in multi-core processor architecture, with each single processor-core able to compute many instructions/operations in parallel. Storage and display interfaces and other modules are added and a digital signal processor (DSP) increases the number of simultaneous computations. An on-chip 32-bit microcontroller initiates and controls the operation and data transfers of all processors, modules and interfaces and can be seen as the main control unit of the camera. In each generation Nikon uses different versions for its professional and consumer DSLRs / MILCs, whereas its compact cameras use totally different architectures. This is different from for example Canons DIGIC: its professional DSLRs double the processors of its consumer DSLR series. The ''Expeed'' is an application-specific integrated circuit (ASIC) built by Fujitsu specifically for Nikon designs according to Nikon specifications. ==Technology== The ''Nikon Expeed'' is based on the Fujitsu Milbeaut imaging processors with 16-bit per pixel〔(Nikon: Nikon's original digital image-processing concept “Expeed” )〕 multi-core FR-V processor architecture, using a highly parallel pipelined architecture which allows efficient hardware use, increasing throughput and reducing power consumption. Each core uses an eight-way 256-bit very long instruction word (VLIW, MIMD) and is organized in a four-unit superscalar pipelined architecture (Integer (ALU)-, Floating-point- and two media-processor-units) giving a peak performance of up to 28 instructions per clock cycle and core. Due to the used four-way single instruction, multiple data (SIMD) vector processor units, data is processed with up to 112 data operations per cycle and core.〔(Fujitsu: FR-V single-chip multicore processor )〕 An on-chip 32-bit Fujitsu FR RISC microcontroller core is used to initiate and control all processors, modules and interfaces.〔(Fujitsu: Milbeaut Imaging Processors )〕〔(Fujitsu: Image processing system for digital cameras: Milbeaut M-4 )〕〔(Nikon Hacker: Camera Matrix )〕〔(Photo-Parts: Nikon DSC models + components search result )〕〔(Fujitsu Develops Multi-core Processor for High-Performance Digital Consumer Products )〕 The ''Expeed'' versions designated EI-14x and the ''Expeed'' 2 and 3 additionally include a HD video codec engine (FR-V based) and an 16-bit DSP with separate on-chip 4-block Harvard RAM which is usable for example for additional image- and audio-processing. The ''Expeed 3 (FR)'' (EI-158/175) is based on an improved ''Expeed 2'' EI-154 with greatly increased processing speed. A new architecture in the ''Expeed 3 (ARM)'' offers a highly increased speed in its image processor (with even two pipelines on the EI-160), its H.264 video encoder and is controlled by a dual-core ARM architecture microcontroller replacing the Fujitsu FR.〔(Nikon: Expeed3 (D-SLR series) )〕〔(Fujitsu Releases 6th Generation of Milbeaut Imaging Processors )〕 抄文引用元・出典: フリー百科事典『 ウィキペディア（Wikipedia）』 ■ウィキペディアで「Expeed」の詳細全文を読む スポンサード リンク
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