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Front end of line
The front-end-of-line (FEOL) is the first portion of IC fabrication where the individual devices (transistors, capacitors, resistors, etc.) are patterned in the semiconductor.〔
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FEOL generally covers everything up to (but not including) the deposition of metal interconnect layers.
FEOL contains all processes of CMOS fabrication needed to form fully isolated CMOS elements:
# Selecting the type of wafer to be used; Chemical-mechanical planarization and cleaning of the wafer.
# Shallow trench isolation (STI) (or LOCOS in early processes, with feature size > 0.25 μm)
# Well formation
# Gate module formation
# Source and drain module formation
==References==
抄文引用元・出典: フリー百科事典『 ウィキペディア（Wikipedia）』
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