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FR-V (microprocessor)
The Fujitsu FR-V (Fujitsu RISC-VLIW) is one of the very few processors ever able to process both a very long instruction word (VLIW) and vector processor instructions at the same time, increasing throughput with high parallel computing while increasing performance per watt and hardware efficiency. The family was presented in 1999.〔(Fujitsu Scientific & Technical Journal: FR500 VLIW-architecture High-performance Embedded Microprocessor by Takao Sukemura )〕 Its design was influenced by the VPP500/5000 models of the Fujitsu VP/2000 vector processor supercomputer line.〔(8way VLIW CPU quad-core CPU ) Fujitsu Laboratories (translated)〕
Featuring a 1-8 way very long instruction word (VLIW, Multiple Instruction Multiple Data (MIMD), up to 256 bit) instruction set it additionally uses a 4-way single instruction, multiple data (SIMD) vector processor core. A 32-bit RISC instruction set in the superscalar core is combined with most variants integrating a dual 16-bit media processor also in VLIW and vector architecture. Each processor core is superpipelined as well as 4-unit superscalar.
A typical integrated circuit integrates a system on a chip and further multiplies speed by integrating multiple cores. Due to the very low power requirements it is a solution even for battery-powered applications.
==Variants==
The family started with the FR-500, includes FR-300, FR-400, FR-450, FR-550 and FR1000 architecture 32-bit processors, can run Linux, RTLinux, VxWorks, eCos, ITRON or cryptlib and is also supported by the Softune Integrated development environment and the GNU Compiler Collection〔(FR-V Built-in Functions ) GNU Compiler Collection〕〔(The Definitive Guide to GCC By William von Hagen )〕 or GNUPro.
It is often used for image processing or video processing with most variants including a dual 16-bit media-processor.〔(Media Processor FR-V Family SoC Mounting Peripheral ) Fujitsu〕
抄文引用元・出典: フリー百科事典『 ウィキペディア（Wikipedia）』
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