|
The IMP-16, by National Semiconductor, was the first multi-chip 16-bit microprocessor. It consisted of five PMOS integrated circuits: four identical RALU chips (Register and ALU) providing the data path, and one CROM (Control and ROM) providing control sequencing and microcode storage. The IMP-16 provided four 16-bit accumulators, two of which could be used as index registers. The instruction set architecture was similar to that of the Data General Nova. The chip set could be extended with a multiply and divide CROM chip (IMP-16A / 522D) that implemented 16 bit multiply and divide routines using the ALU's. The chip set was driven by a 2 phase non-overlapping clock that had a +5 to -12 swing. An integral part of the architecture was a 16 bit input mux that provided various condition bits from the ALUs such as zero, carry, overflow along with general purpose inputs. The IMP-16 was later superseded by National Semiconductor's PACE and INS8900 single-chip 16-bit microprocessors, which had a similar architecture but were not binary compatible. The IMP-16 is a bit-slice processor. Each RALU chip provides a 4-bit slice of the register and arithmetic portion of a processor. Multiple RALU chips work in parallel, providing a longer word length. Each RALU chip provides 4 bits of the program counter, several registers, the ALU, a 16-word LIFO stack, and the status flags.〔 ("Use of RALU flags" ). 〕〔 ("IMP-00A/520 MOS/LSI register and arithmetic logic unit (RALU)" ). p. 1 〕 ==References== *National Semiconductor (1973). (IMP-16 Programming and Assembler Manual ). 抄文引用元・出典: フリー百科事典『 ウィキペディア（Wikipedia）』 ■ウィキペディアで「IMP-16」の詳細全文を読む スポンサード リンク
|