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RH-32 The RH-32 was a radiation-hardened 32-bit microprocessor chipset developed by the USAF Rome Laboratories〔Schechter, Joanne. "Will commercial strategy deliver cost, time savings? (military microprocessors)(includes related article on SGS-Thomson's new transputers)." EDN. Canon Communications L.L.C. 1991. Retrieved August 13, 2012 from HighBeam Research (subscription required): http://www.highbeam.com/doc/1G1-11230801.html〕 for the Ballistic Missile Defense Agency, and produced by Honeywell (later, TRW) for Aerospace applications. It achieves a throughput of 20 MIPS. It was a three-chip set, consisting of Central Processing Unit, Floating Point Unit, and Cache Memory. == References ==
抄文引用元・出典: フリー百科事典『 ウィキペディア(Wikipedia)』 ■ウィキペディアで「RH-32」の詳細全文を読む
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