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RHPPC
The RHPPC is a radiation hardened processor based on PowerPC 603e technology licensed from Motorola (now Freescale) and manufactured by Honeywell. The RHPPC is equivalent to the commercial PowerPC 603e processor with the minor exceptions of the phase locked loop (PLL) and the processor version register (PVR). The RHPPC processor is compatible with the PowerPC architecture (Book I-III), the PowerPC 603e programmers interface and is also supported by common PowerPC software tools and embedded operating systems, like VxWorks.
== Technical details ==
The RHPPC processor generates 190 MIPS with the Dhrystone mix with its core clock at 100 MHz (i.e. the RHPPC processor completes 1.9 instructions per cycle). The RHPPC runs with a 25, 33.3, 40, or 50 MHz 60x bus clock (SYSCLK) which is generated based on the PCI clock. The 60x bus clock is de-skewed on-chip by a PLL and can also be multiplied.
The RHPPC processor is a superscalar machine with five execution units: system register unit, integer unit, load/store unit, floating point unit, and branch processing unit. The dispatch unit can issue two instructions per cycle. The floating point unit has a three level deep pipeline. Out of order execution is supported through the use of shadow or rename registers. The completion unit can complete two instructions per cycle in order by copying results from the rename registers to the real registers. Independently, the branch processing unit can complete a branch each cycle. Thus, in theory, the RHPPC processor can complete three instructions per cycle. Within the RHPPC processor there is a 16 kB instruction
and a 16 kB data L1 caches that are 4 way set associative, and support write through or copy-back protocol. A cache line is fixed at eight words.
抄文引用元・出典: フリー百科事典『 ウィキペディア（Wikipedia）』
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