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SigmaQuad - Quad Data Rate SRAM is a type of static RAM computer memory that can transfer up to four words of data in each clock cycle. Like Double Data-Rate (DDR) SDRAM, SigmaQuad SRAM transfers data on both rising and falling edges of the clock signal. This requires more wires between the memory device and the memory controller, but doubles the theoretical maximum data transfer rate. SigmaQuad SRAM uses two clocks, one for read data and one for write data. This helps to eliminate problems caused by the propagation delay of the clock wiring, and allows concurrent reads and writes, thereby doubling the transfer rate again. SigmaQuad SRAM was designed for high-speed communications and networking applications, where data throughput is more important than cost, power efficiency or density. The technology was a joint development by (GSI Technology ), (Sony Microelectronics ) and (ISSI ). Contents () == Clock Inputs == Clocks: #Input clock: K, /K #Output clock: C, /C 抄文引用元・出典: フリー百科事典『 ウィキペディア（Wikipedia）』 ■ウィキペディアで「Sigmaquad」の詳細全文を読む スポンサード リンク
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