翻訳と辞書 Words near each other ・ Subtle as a Flying Mallet ・ Subtle body ・ Subtle cardinal ・ Subtle expression ・ Subtle Ways ・ SubtleTea ・ Subtonic ・ Subtract a square ・ Subtract with carry ・ Subtraction ・ Subtractive color ・ Subtractive drawing ・ Subtractive notation ・ Subtractive synthesis ・ SubtractiveLAD ・ Subtractor ・ Subtrade ・ Subtranstillaspis ・ Subtropical (disambiguation) ・ Subtropical antechinus ・ Subtropical climate vegetated roof ・ Subtropical Countercurrent ・ Subtropical cyclone ・ Subtropical doradito ・ Subtropical front ・ Subtropical Indian Ocean Dipole ・ Subtropical pygmy owl ・ Subtropical ridge ・ Subtropical Storm Alpha (1972) ・ Subtropical Storm Andrea (2007) Dictionary Lists mini英和辞書 mini和英辞書 Webster 1913 Latin-English FOLDOC Wikipedia English ウィキペディア

翻訳と辞書　辞書検索 [ 開発暫定版 ] スポンサード リンク Subtractor ： ウィキペディア英語版 Subtractor In electronics, a subtractor can be designed using the same approach as that of an adder. The binary subtraction process is summarized below. As with an adder, in the general case of calculations on multi-bit numbers, three bits are involved in performing the subtraction for each bit of the difference: the minuend ($X\_$), subtrahend ($Y\_$), and a borrow in from the previous (less significant) bit order position ($B\_$). The outputs are the difference bit ($D\_$) and borrow bit $B\_$. The subtractor is best understood by considering that the subtrahend and both borrow bits have negative weights, whereas the X and D bits are positive. The operation performed by the subtractor is to rewrite $X\_-Y\_-B\_$ (which can take the values -2, -1, 0, or 1) as the sum $-2B\_+D\_$. :$D\_\; =\; X\_\; \backslash oplus\; Y\_\; \backslash oplus\; B\_$ : Subtractors are usually implemented within a binary adder for only a small cost when using the standard two's complement notation, by providing an addition/subtraction selector to the carry-in and to invert the second operand. :$-B\; =\; \backslash bar\; +\; 1$ (definition of two's complement negation) :$\backslash begin$ A - B & = A + (-B) \\ & = A + \bar + 1 \\ \end ==Half subtractor== The half subtractor is a combinational circuit which is used to perform subtraction of two bits. It has two inputs, the minuend $X$ and subtrahend $Y$ and two outputs the difference $D$ and borrow out $B\_\backslash text$. The borrow out signal is set when the subtractor needs to borrow from the next digit in a multi-digit subtraction. That is, $B\_\; =\; 1$ if and only if $X\; =\; 0$ and $Y\; =\; 1$. An important point worth mentioning is that the half subtractor diagram aside implements $Y\; -\; X$ and not $X\; -\; Y$ since $B\_\backslash text$ on the diagram is given by :$B\_$. This is an important distinction to make since subtraction itself is not commutative, but the difference bit $D$ is calculated using an XOR gate which is commutative. The truth table for the half subtractor is: Using the table above and a Karnaugh map, we find the following logic equations for $D$ and $B\_\backslash text$: :$D\; =\; X\; \backslash oplus\; Y$ :$B\_\backslash text\; =\; \backslash overline\; X\; \backslash cdot\; Y$. 抄文引用元・出典: フリー百科事典『 ウィキペディア（Wikipedia）』 ■ウィキペディアで「Subtractor」の詳細全文を読む スポンサード リンク 翻訳と辞書 : 翻訳のためのインターネットリソース Copyright(C) kotoba.ne.jp 1997-2016. All Rights Reserved.