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Ultracomputer : ウィキペディア英語版
Ultracomputer
The NYU Ultracomputer is a significant processor design in the history of parallel computing. The system has ''N'' processors, ''N'' memories and an ''N log N'' message-passing switch connecting them. The switch uses an innovative fetch-and-add instruction which will combine references from several processors into a single reference, to reduce memory contention.
The machine was developed in the 1980s at the Courant Institute of Mathematical Sciences Computer Science Department, based on a concept developed by Jacob T. Schwartz. Most of the work done was theoretical, but two prototypes were built:〔(The NYU Ultracomputer Project )〕〔("An Overview of the NYU Ultracomputer Project (1986)", Allan Gottlieb )〕〔(The NYU Ultracomputer—designing a MIMD, shared-memory parallel machine (Extended Abstract) )〕
* An 8 processor bus-based machine
* A 16 processor, 16 memory-module machine with custom VLSI switches supporting the fetch-and-add instruction.
==References==



抄文引用元・出典: フリー百科事典『 ウィキペディア(Wikipedia)
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