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VHDL-AMS is a derivative of the hardware description language VHDL (IEEE standard 1076-1993). It includes analog and mixed-signal extensions (AMS) in order to define the behavior of analog and mixed-signal systems (IEEE 1076.1-1999). The VHDL-AMS standard was created with the intent of enabling designers of analog and mixed signal systems and integrated circuits to create and use modules that encapsulate high-level behavioral descriptions as well as structural descriptions of systems and components.〔Christen E., Bakalar K.,"VHDL-AMS-a hardware description language for analog and mixed-signal applications",Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on (also Circuits and Systems II: Express Briefs, IEEE Transactions on ) Volume 46, Issue 10, Oct. 1999, pp. 1263 - 1272.〕 VHDL-AMS is an industry standard modeling language for mixed signal circuits. It provides both continuous-time and event-driven modeling semantics, and so is suitable for analog, digital, and mixed analog/digital circuits. It is particularly well suited for verification of very complex analog, mixed-signal and radio frequency integrated circuits. == Code example == In VHDL-AMS, a design consists at a minimum of an ''entity'' which describes the interface and an ''architecture'' which contains the actual implementation. In addition, most designs import library modules. Some designs also contain multiple architectures and ''configurations''. A simple ideal diode in VHDL-AMS would look something like this: -- (this is a VHDL comment) library IEEE; use IEEE.math_real.all; use IEEE.electrical_systems.all; -- this is the entity entity DIODE is generic (iss : current := 1.0e-14; -- Saturation current af : real := 1.0; -- Flicker noise coefficient kf : real := 0.0); -- Flicker noise exponent port (terminal anode, cathode : electrical); end entity DIODE; architecture IDEAL of DIODE is quantity v across i through anode to cathode; constant vt : voltage := 0.0258; -- Thermal voltage at 300 K begin i == iss * (exp(v/vt) - 1.0); end architecture IDEAL; 抄文引用元・出典: フリー百科事典『 ウィキペディア（Wikipedia）』 ■ウィキペディアで「VHDL-AMS」の詳細全文を読む スポンサード リンク
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