翻訳と辞書 Words near each other ・ Verification of employment ・ Verification-based message-passing algorithms in compressed sensing ・ Verificationism ・ Verified Audit Circulation ・ Verified Carbon Standard ・ Verified-Accredited Wholesale Distributors ・ VeriFlux ・ Verifone ・ Verify in field ・ Verigar issue ・ Verige bridge ・ Verigy ・ Verija ・ Veriko Anjaparidze ・ Verila Glacier ・ Verilator ・ Verilite Sunbird ・ Verilog ・ Verilog Procedural Interface ・ Verilog-A ・ Verilog-AMS ・ VerilogCSP ・ Verilus sordidus ・ Verily ・ Verily Anderson ・ Verimli, Tarsus ・ Verin ・ Verin (Dungeons & Dragons) ・ Verin Akhtala ・ Verin Artashat Dictionary Lists mini英和辞書 mini和英辞書 Webster 1913 Latin-English FOLDOC Wikipedia English ウィキペディア

翻訳と辞書　辞書検索 [ 開発暫定版 ] スポンサード リンク Verilator ： ウィキペディア英語版 Verilator Verilator is a free and open source software tool which converts Verilog (a hardware description language) to a cycle-accurate behavioral model in C++ or SystemC. It is restricted to modeling the synthesizable subset of Verilog and the generated models are cycle-accurate, 2-state, with synthesis (zero delay) semantics. As a consequence the models typically offer higher performance than the more widely used event driven simulators, which can process the entire Verilog language and model behavior ''within'' the clock cycle. Verilator is now used within academic research, open source projects and for commercial semiconductor development. It is part of the growing body of free EDA software. == Usage == Verilator has seen its widest adoption in the academic and open source communities. The semiconductor industry has been more cautious in its adoption of an open source tool, and has the financial wherewithal to use commercial alternatives. 抄文引用元・出典: フリー百科事典『 ウィキペディア（Wikipedia）』 ■ウィキペディアで「Verilator」の詳細全文を読む スポンサード リンク 翻訳と辞書 : 翻訳のためのインターネットリソース Copyright(C) kotoba.ne.jp 1997-2016. All Rights Reserved.