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Pentium Pro
(Known as "P6" during development) Intel's successor to the Pentium processor, in development Jan 1995, generally available 1995-11-01. The P6 has an internal RISC architecture with a CISC-RISC translator, 3-way superscalar execution, and {out-of order execution} (or "speculative execution", which Intel calls "Dynamic Execution"). It also features branch prediction and {register renaming}, and is superpipelined (14 stages).
The P6 is made as a two-chip assembly: the first chip is the CPU and 16 kilobyte {first-level cache} (5.5 million transistors) and the other is a 256 (or 512) kilobyte second-level cache (15 million transistors). The first version has a clock rate of 133 Mhz and consumes about 20W of power. It is about twice as fast as the 100 MHz Pentium. The original 0.35 micron versions of the Pentium Pro released on 1995-11-01 run at 150 and 166 Mhz for desktop machines and up to 200 Mhz for s
of 133 Mhz and consumes about 20W of power. It is about twice as fast as the 100 MHz Pentium. The original 0.35 micron versions of the Pentium Pro released on 1995-11-01 run at 150 and 166 Mhz for desktop machines and up to 200 Mhz for s
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